In general, an optical digital receiver is comprised of a photodetector module and a monolithic integrated circuit for receiving the detected signal to regenerate it. Since the integrated circuit includes amplifiers which are direct-current coupled, it is very important to solve the offset-voltage problem stemming from variation of its power supply voltage and ambient temperature.
FIG. 1 is a block diagram illustrating the structure of a conventional optical receiver for continuous signals which is widely used. The signal detected by the photodetector 1 is amplified by a differential output preamplifier 2 and then regenerated by a regenerating circuit 3. The optical receiver employs an automatic offset control circuit comprising peak detectors 6,7 and a differential input amplifier 6. The peak detectors 6 and 7 detect peak values of positive and negative output voltages of a preamplifier 2, respectively. The differential input amplifier 6 receives the peak values and outputs the difference voltage between these values to the preamplifier 2 to cancel out an offset voltage thereof.
However, the above-mentioned control is inappropriate for burst signals as shown in FIG. 9A with power level subject to more rapid changes than the time constant of the automatic offset control circuit. The reason is that the offset control is properly performed only for pulse series having the maximum power level within a period equal to the time constant of the automatic offset control circuit as shown in FIG. 9B, so that other pulse series may have a high probability of being recognized as space by the regenerating circuit 3.
FIG. 2 is a block diagram illustrating a conventional basic structure of an optical receiver suitable for burst signals. FIG. 3 is a block diagram showing a conventional embodiment of such an optical receiver. The receiver shown in FIG. 2 employs an automatic offset control circuit comprising the peak detector 4, a bottom detector 8 and the differential input amplifier 6. The peak detector 6 detects a peak value of negative output of the preamplifier 2 and the bottom detector 8 detects a bottom value of positive output thereof.
Such an offset control is suitable for a burst signal with a power level subject to more rapid changes than the time constant of the automatic offset control circuit as shown in FIG. 9A. The offset control makes it possible to keep the difference between the positive and negative output voltages of the preamplifier 2 constant in value when receiving no input digital signal or the lowest level signal of the input digital signal as shown in FIG. 9C. Therefore, the burst pulse series emitted from the preamplifier 2 are all correctly recognized as either a mark or space by using the threshold level controller 7 and the regenerating circuit 3.
However, the structure shown in FIG. 2 is difficult to be realized because both the peak detector 4 and the bottom detector 8 are required to have a high precision and the same offset characteristic.
In order to avoid such difficulty, a configuration as shown in FIG. 3 is proposed (Tran. of National Meeting of the Institute of Electronics, Information and Communication Engineers (IEICE), Fall, 1992, Vol. 4, page 110). In FIG. 3, the offset control circuit is comprised of a booster amplifier 9, the peak detector 4, a reference voltage generation circuit 10 and the differential input amplifier 6. This circuit can obtain the waveform shown in FIG. 9C as well. The booster amplifier 10 inserted between the preamplifier 2 and the peak detector 4 reduces the influence of the offset of the peak detector 4 upon the output of the amplifier 2.
However, in this offset control circuit, output variation of the peak detector 4 caused by power supply and temperature variations must be equal to that of the reference voltage generation circuit 10. Therefore, an additional compensating circuit is required, resulting in the increased number of circuit elements.